As is well known, an electronic switching system (ESS) selectively connects two assigned subscribers out of many so as to establish a communication line between them.
Basic components of the ESS include a multiplicity of access subsystem processors, an interconnection subsystem processor and a central control subsystem processor. Each access subsystem processor includes a plurality of subscriber interfacing units, time division switching units and local data link modules to communicate information between two selected subscribers, wherein the number of the time division switching units and the local data link modules is decided based on the required capacity of the ESS.
When the two selected subscribers are coupled with a single access subsystem processor, they are connected within the same access subsystem processor. On the other hand, when the two selected subscribers are coupled with two separate access subsystem processors, they are connected through the interconnection subsystem processor. The interconnection subsystem processor, coupled with each of the access subsystem processors and the central control subsystem processor, includes a central data link module and a space division switching unit; and connects the two selected subscribers. Finally, the central control subsystem processor coupled with the access subsystem processors and the interconnection subsystem processor controls all the operations and maintenance processes of the ESS.
However, in order to efficiently communicate information between the connected subscribers, there are generally incorporated, N, e.g., 2, local data link processors within each local data link module instead of one, N being a positive integer greater than 1. When an active local data link processor is malfunctioning, the operation mode of the malfunctioning processor is set to be inactive or stand-by and the operation mode of the other is set to be active, thereby guaranteeing a continuous communication of information between the two connected subscribers.
Specifically, each local data link processor includes a plurality of components, e.g., a clock signal generation device, an address generator and the like. Initially, a first set of a clock pulse and a frame pulse signals (CRS and FPS) is issued by a clock and alarm signal generator contained in the clock signal generation device of one of the two local data link processors, wherein, for example, transfer rate of the CPS and FPS in the first set is 65.536 Mhz and 8 Khz, respectively. Further, at the clock and alarm signal generator, an alarm signal is obtained by checking the status of the components in the local data link processor and the status of the CPS in the first set.
Next, a clock selector in the clock signal generation device receives the first set of the CPS and the FPS and the alarm signal, a second set of a CPS and a FPS and an alarm signal issued by a clock and alarm signal generator in a clock signal generation device in the other of the two local data link processors and selects one of the two sets of the CPS's and the FPS's based on the alarm signals applied thereto. Finally, the CPS in the selected set is converted to a signal of a predetermined transfer rate, e.g., 8.192 Mhz; and the FPS therein is converted to a signal with a same transfer rate as that of the CPS, but with a predetermined duty cycle different from that of the CPS. The converted set of the CPS and the FPS is provided to each of the corresponding time division switching unit and the address generator as a set a reference clock pulse and a reference frame pulse signals (RCPS and RFPS) for use therein, wherein the transfer rate of the signals is, e.g., 16.384 Mhz and 8 Khz, respectively.
However, in the conventional clock signal generation device, the set of the RCPS and the RFPS is obtained by sets of CPS's and FPS's and alarm signals which are provided from two clock and alarm signal generators contained in a corresponding local data link module only, without paying due regard to these sets of CPS's and FPS's issued by other local data link modules. Therefore, in case of communicating information between the connected subscribers through two local data link modules, there may occur phase discrepancies in the sets of the RCPS's and the RFPS's obtained by the link modules, thereby resulting in a disconnection between the connected subscribers.